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? semiconductor components industries, llc, 2001 october, 2001 rev. 5 1 publication order number: mc33263/d mc33263 ultra low noise 150 ma low dropout voltage regulator with on/off control housed in a sot23l package, the mc33263 delivers up to 150 ma where it exhibits a typical 180 mv dropout. with an incredible noise level of 25 vrms (over 100 hz to 100 khz, with a 10 nf bypass capacitor), the mc33263 represents the ideal choice for sensitive circuits, especially in portable applications where noise performance and space are premium. the mc33263 also excels in response time and reacts in less than 25 s when receiving an off to on signal (with no bypass capacitor). thanks to a novel concept, the mc33263 accepts output capacitors without any restrictions regarding their equivalent series resistance (esr) thus offering an obvious versatility for immediate implementation. with a typical dc ripple rejection better than 90 db (70 db @ 1.0 khz), it naturally shields the downstream electronics against choppy power lines. additionally, thermal shutdown and shortcircuit protection provide the final product with a high degree of ruggedness. features: ? very low quiescent current 170 m a (on, no load), 100 na (off, no load) ? very low dropout voltage, typical value is 137 mv at an output current of 100 ma ? very low noise with external bypass capacitor (10 nf), typically 25 m vrms over 100 hz to 100 khz ? internal thermal shutdown ? extremely tight line regulation typically 90 db ? ripple rejection 70 db @ 1.0 khz ? line transient response: 1.0 mv for v in = 3.0 v ? extremely tight load regulation, typically 20 mv at i out = 150 ma ? multiple output voltages available ? logic level on/off control (ttlcmos compatible) ? esr can vary from 0 to 3.0 ? functionally and pin compatible with tk112xxa/b series applications: ? all portable systems, battery powered systems, cellular telephones, radio control systems, toys and low voltage systems sot23l nw suffix case 318j 1 6 http://onsemi.com 1 6 5 2 3 (top view) on/off gnd v in pin connections and marking diagrams bypass gnd v out 4 xaylw x = voltage option code a = assembly location l = wafer lot y = year w = work week see detailed ordering and shipping information on page 12 of this data sheet. ordering information sot23l
mc33263 http://onsemi.com 2 gnd figure 1. mc33263 block diagram * current limit * antisaturation * protection input output gnd bypass 3 2 6 4 5 band gap reference on/off shutdown 1 thermal shutdown maximum ratings rating symbol pin # value unit power supply voltage v in 6 12 v power dissipation and thermal resistance maximum power dissipation p d internally limited w thermal resistance, junctiontoair r ja 210 c/w operating ambient temperature t a 40 to +85 c maximum junction temperature t jmax 150 c storage temperature range t stg 60 to +150 c electrical characteristics (for typical values t a = 25 c, for min/max values t a = 40 c to +85 c, max t j = 150 c) characteristics symbol pin # min typ max unit control electrical characteristics input voltage range v on/off 1 0 v in v on/off input current (all versions) i on/off 1 a v on/off = 2.4 v 2.5 on/off input voltages (all versions) v on/off 1 v logic a0o, i.e. off state 0.3 logic a1o, i.e. on state 2.2 currents parameters current consumption in off state (all versions) iq off a off mode current: v in = v out + 1.0 v, i out = 0 ma 0.1 2.0 current consumption in on state (all versions) iq on a on mode sat current: v in = v out + 1.0 v, i out = 0 ma 170 200 current consumption in saturation on state (all versions) iq sat a on mode sat current: v in = v out 0.5 v, i out = 0 ma 900 1400 current limit v in = v out + 1.0 v, (all versions) i max ma output shortcircuited (note 1) 175 210 1. i out (output current) is the measured current when the output voltage drops below 0.3 v with respect to v out at i out = 30 ma.
mc33263 http://onsemi.com 3 electrical characteristics (for typical values t a = 25 c, for min/max values t a = 40 c to +85 c, max t j = 150 c) characteristics symbol pin # min typ max unit v in = v out + 1.0 v, t a = 25 c, 1.0 ma < i out < 150 ma v out 4 v 2.8 suffix 2.74 2.8 2.86 3.0 suffix 2.94 3.0 3.06 3.2 suffix 3.13 3.2 3.27 3.3 suffix 3.23 3.3 3.37 3.8 suffix 3.72 3.8 3.88 4.0 suffix 3.92 4.0 4.08 4.75 suffix 4.66 4.75 4.85 5.0 suffix 4.90 5.0 5.1 v in = v out + 1.0 v, 40 c < t a < 80 c, v out 4 v 1.0 ma < i out < 150 ma 2.8 suffix 2.7 2.8 2.9 3.0 suffix 2.9 3.0 3.1 3.2 suffix 3.09 3.2 3.31 3.3 suffix 3.18 3.3 3.42 3.8 suffix 3.67 3.8 3.93 4.0 suffix 3.86 4.0 4.14 4.75 suffix 4.58 4.75 4.92 5.0 suffix 4.83 5.0 5.17 line and load regulation, dropout voltages line regulation (all versions) reg line 4/6 mv v out + 1.0 v < v in < 12 v, i out = 60 ma 2.0 10 load regulation (all versions) v in = v out + 1.0 v reg load 1 mv i out = 1.0 to 60 ma 8.0 25 i out = 1.0 to 100 ma 15 35 i out = 1.0 to 150 ma 20 45 dropout voltage (all versions) v in v out 4, 6 mv i out = 10 ma 30 90 i out = 100 ma 137 230 i out = 150 ma 180 260 dynamic parameters ripple rejection (all versions) 4, 6 db v in = v out + 1.0 v, v pp = 1.0 v, f = 1.0 khz, i out = 60 ma 60 70 line transient response 4, 6 mv v in = v out + 1.0 v to v out + 4.0 v, i out = 60 ma, 1.0 d(v in )/dt = 15 mv/ s output noise voltage (all versions) v rms 4, 6 m vrms c out = 1.0 m f, i out = 60 ma, f = 100 hz to 100 khz c bypass = 10 nf 25 c bypass = 1.0 nf 40 c bypass = 0 nf 65 output noise density v n 4 nv/ hz c out = 1.0 m f, i out = 60 ma, f = 1.0 khz 230 output rise time (all versions) t r 4 c out = 1.0 m f, i out = 30 ma, v on/off = 0 to 2.4 v 1% of on/off signal to 99% of nominal output voltage without bypass capacitor 40 m s with c bypass = 10 nf 1.1 ms thermal shutdown thermal shutdown (all versions) 150 c
mc33263 http://onsemi.com 4 definitions load regulation the change in output voltage for a change in load current at constant chip temperature. dropout voltage the input/output differential at which the regulator output no longer maintains regulation against further reductions in input voltage. measured when the output drops 100 mv below its nominal value (which is measured at 1.0 v differential), dropout voltage is affected by junction temperature, load current and minimum input supply requirements. output noise voltage the rms ac voltage at the output with a constant load and no input ripple, measured over a specified frequency range. maximum power dissipation the maximum total dissipation for which the regulator will operate within specifications. quiescent current current which is used to operate the regulator chip and is not delivered to the load. line regulation the change in input voltage for a change in the input voltage. the measurement is made under conditions of low dissipation or by using pulse techniques such that the average chip temperature is not significantly affected. line transient response typical over and undershoot response when input voltage is excited with a given slope. thermal protection internal thermal shutdown circuitry is provided to protect the integrated circuit in the event that the maximum junction temperature is exceeded. when activated, typically 150 c, the regulator turns off. this feature is provided to prevent catastrophic failures from accidental overheating. maximum package power dissipation the maximum package power dissipation is the power dissipation level at which the junction temperature reaches its maximum value i.e. 125 c. the junction temperature is rising while the difference between the input power (v cc x i cc ) and the output power (v out x i out ) is increasing. depending on ambient temperature, it is possible to calculate the maximum power dissipation, maximum load current or maximum input voltage (see application hints: protection). the maximum power dissipation supported by the device is a lot increased when using appropriate application design. mounting pad configuration on the pcb, the board material and also the ambient temperature are affected the rate of temperature rise. it means that when the i c has good thermal conductivity through pcb, the junction temperature will be alowo even if the power dissipation is great. the thermal resistance of the whole circuit can be evaluated by deliberately activating the thermal shutdown of the circuit (by increasing the output current or raising the input voltage for example). then you can calculate the power dissipation by subtracting the output power from the input power. all variables are then well known: power dissipation, thermal shutdown temperature (150 c for mc33263) and ambient temperature.
mc33263 http://onsemi.com 5 application hints input decoupling as with any regulator, it is necessary to reduce the dynamic impedance of the supply rail that feeds the component. a 1.0 f capacitor either ceramic or tantalum is recommended and should be connected close to the mc33263 package. higher values will correspondingly improve the overall line transient response. output decoupling thanks to a novel concept, the mc33263 is a stable component and does not require any equivalent series resistance (esr) neither a minimum output current. capacitors exhibiting esrs ranging from a few m up to 3.0 can thus safely be used. the minimum decoupling value is 1.0 f and can be augmented to fulfill stringent load transient requirements. the regulator accepts ceramic chip capacitors as well as tantalum devices. noise performances unlike other ldos, the mc33263 is a true lownoise regulator. with a 10 nf bypass capacitor, it typically reaches the incredible level of 25 vrms overall noise between 100 hz and 100 khz. to give maximum insight on noise specifications, on semiconductor includes spectral density graphics as well as noise dependency versus bypass capacitor. the bypass capacitor impacts the startup phase of the mc33263 as depicted by the datasheet curves. a typical 1.0 ms settling time is achieved with a 10 nf bypass capacitor. however, thanks to its lownoise architecture, the mc33263 can operate without bypass and thus offers a typical 20 s startup phase. in that case, the typical output noise stays lower than 65 vrms between 100 hz 100 khz. protections the mc33263 hosts several protections, conferring natural ruggedness and reliability to the products implementing the component. the output current is internally limited to a minimum of 175 ma while temperature shutdown occurs if the die heats up beyond 150 c. these value lets you assess the maximum differential voltage the device can sustain at a given output current before its protections come into play. the maximum dissipation the package can handle is given by: p max t jmax t a r ja if t jmax is internally limited to 150 c, then the mc33263 can dissipate up to 595 mw @ 25 c. the power dissipated by the mc33263 can be calculated from the following formula: ptot v in i gnd (i out ) v in v out i out or vin max ptot v out i out i gnd i out if a 150 ma output current is needed, the ground current is extracted from the datasheet curves: 6.5 ma @ 150 ma. for a mc33263nw28r2 (2.8 v), the maximum input voltage will then be 6.48 v, a rather comfortable margin. typical application the following figure portraits the typical application for the mc33263 where both input/output decoupling capacitors appear. figure 2. a typical mc33263 application with recommended capacitor values 654 123 input output c3 1.0 f c2 1.0 f c1 10 nf on/off mc33263 as for any low noise designs, particular care has to be taken when tackling printed circuit board (pcb) layout. the following figure gives an example of a layout where stray inductances/capacitances are minimized. figure 3. printed circuit board
mc33263 http://onsemi.com 6 figure 4. copper side component layout input output on/off differential (v in v out ) mc33263 c2 c3 c1 ++ rpullup this layout is the basis for an mc33263 performance evaluation board where the bnc connectors give the user an easy and quick evaluation mean. mc33263 wakeup improvement in portable applications, an immediate response to an enable signal is vital. if noise is not of concern, the mc33263 without a bypass capacitor settles in nearly 20 s and typically delivers 65 vrms between 100 hz and 100 khz. in ultra lownoise systems, the designer needs a 10 nf bypass capacitor to decrease the noise down to 25 vrms between 100 hz and 100 khz. with the adjunction of the 10 nf capacitor, the wakeup time expands up to 1.0 ms as shown on the datasheet curves. if an immediate response is wanted, following figure's circuit gives a solution to charge the bypass capacitor with the enable signal without degrading the noise response of the mc33263. at poweron, c4 is discharged. when the control logic sends its wakeup signal by going to a high level, the pnp base is momentarily tight to ground. the pnp switch closes and immediately charges the bypass capacitor c1 toward its operating value. after a few s, the pnp opens and becomes totally transparent to the regulator. this circuit improves the response time of the regulator which drops from 1.0 ms down to 30 s. the value of c4 needs to be tweaked in order to avoid any bypass capacitor overload during the wakeup transient. figure 5. a pnp transistor drives the bypass pin when enable goes high 654 123 mc33263 ++ c2 1.0 f c3 1.0 f input output c4 470 pf c1 10 nf r2 220 k mmbt2902lt1 q1 on/off
mc33263 http://onsemi.com 7 figure 6. mc33263 wakeup improvement with small pnp transistor 1 ms 30 s mc33263 without wakeup improvement (typical response) mc33263 with wakeup improvement (typical response) the pnp being wired upon the bypass pin, it shall not degrade the noise response of the mc33263. figure 7 confirms the good behavior of the integrated circuit in this area which reaches a typical noise level of 26 vrms (100 hz to 100 khz) at i out = 60 ma. frequency (hz) nv/sqrt (hz) 100 1,000 350 200 150 100 1,000,000 50 10,000 figure 7. noise density of the mc33263 with a 10 nf bypass capacitor and a wakeup improvement network 100,000 250 300 0 c byp = 10 nf v in = 3.8 v v out = 2.8 v c o = 1.0 f i out = 60 ma t amb = 25 c v in = 26 vrms c = 10 nf @ 100 hz 100 khz
mc33263 http://onsemi.com 8 40 2.1 0 7.0 ambient temperature ( c) ground current (ma) figure 8. ground current versus output current output current (ma) figure 9. ground current versus ambient temperature v in = 3.8 v v out = 2.8 v c o = 1.0 mf t amb = 25 c ground current (ma) 20 40 100 20 0 20 40 60 80 1.0 0 2.05 2.0 1.95 1.9 1.8 1.85 60 80 120 140 200 160 180 2.0 3.0 4.0 5.0 6.0 v in = 3.8 v v out = 2.8 v c o = 1.0 f i out = 60 ma typical performance characteristics ground current performances figure 10. quiescent current versus temperature figure 11. line transient response line transient response and output voltage dv in = 3.2 v y2 y1 v in = 3.8 to 7.0 v y1 = 1.0 mv/div y2 = 1.0 v/div x = 1.0 ms i out = 60 ma t amb = 25 c 40 200 temperature ( c) 20 110 100 0 20 40 60 100 80 120 130 140 150 160 170 180 190 quiescent current on mode ( a)
mc33263 http://onsemi.com 9 y1: output current, y2: output voltage y1: output current, y2: output voltage figure 12. i out = 3.0 ma to 150 ma figure 13. i slope = 100 ma/ s (large scale) i out = 3.0 ma to 150 ma v in = 3.8 v y1 = 100 mv/div y2 = 20 mv/div x = 200 s/div t amb = 25 c y2 y1 v in = 3.8 v y1 = 50 ma/div y2 = 20 mv/div x = 20 s t amb = 25 c y2 y1 y1: output current, y2: output voltage y1: output current, y2: output voltage figure 14. i slope = 6.0 ma/ s (large scale) i out = 3.0 ma to 150 ma figure 15. i slope = 2.0 ma/ s (large scale) i out = 3.0 ma to 150 ma v in = 3.8 v y1 = 50 ma/div y2 = 20 mv/div x = 100 s t amb = 25 c y2 y1 v in = 3.8 v y1 = 50 ma/div y2 = 20 mv/div x = 200 s t amb = 25 c y2 y1 load transient response versus load current slope typical performance characteristics
mc33263 http://onsemi.com 10 0 70 bypass capacitor (nf) bypass capacitor (nf) frequency (hz) figure 16. noise density versus bypass capacitor figure 17. rms noise versus bypass capacitor (100 hz 100 khz) figure 18. output voltage settling time versus bypass capacitor figure 19. output voltage settling shape c bypass = 10 nf 2.0 3.0 4.0 5.0 50 40 30 20 0 10 1.0 60 10 v in = 3.8 v v out = 2.8 v c o = 1.0 f i out = 60 ma t amb = 25 c v in = 3.8 v v out = 2.8 v c o = 1.0 f i out = 60 ma t amb = 25 c v in = 3.8 v v out = 2.8 v c out = 1.0 f i out = 50 ma t amb = 25 c figure 20. output voltage settling shape c bypass = 3.3 nf figure 21. output voltage settling shape without bypass capacitor 6.0 7.0 8.0 9.0 0 1200 1.0 2.0 3.0 4.0 6.0 10 1000 800 600 400 0 200 5.0 7.0 9.0 8.0 200 s/div 500 mv/div c byp = 10 nf nv/hz 100 350 1000 10,000 250 200 150 100 0 1,000,000 300 50 100,000 v in = 3.8 v v out = 2.8 v c o = 1.0 f i out = 60 ma t amb = 23 c c byp = 10 nf 3.3 nf 0 nf v in = 3.8 v v out = 2.8 v c out = 1.0 f i out = 50 ma t amb = 25 c 100 s/div 500 mv/div c byp = 3.3 nf v in = 3.8 v v out = 2.8 v c out = 1.0 f i out = 50 ma t amb = 25 c 10 s/div 500 mv/div c byp = 0 nf typical performance characteristics noise performances settling time performances vn = 65 vrms @ c bypass = 0 vn = 30 vrms @ c bypass = 3.3 nf vn = 25 vrms @ c bypass = 10 nf over 100 hz to 100 khz settline time ( a) rms noise ( a)
mc33263 http://onsemi.com 11 dropout (mv) 40 250 temperature ( c) temperature ( c) i o (ma) figure 22. dropout voltage versus i out figure 23. dropout voltage versus temperature figure 24. output voltage versus temperature figure 25. output voltage versus i out 20 0 20 150 100 0 100 200 50 figure 26. ripple rejection versus frequency with 10 nf bypass capacitor figure 27. ripple rejection versus frequency without bypass capacitor 40 60 80 40 2.805 output voltage (v) 20 0 40 100 2.795 2.790 2.785 2.780 2.770 2.775 20 80 60 dropout (mv) 10 60 250 200 150 100 0 150 50 100 typical performance characteristics dropout voltage output voltage ripple rejection performances frequency (hz) v in = 3.8 v v out = 2.8 v c o = 1.0 f i out = 60 ma t amb = 25 c 100 0 (db) 1000 100,000 10 60 70 80 100 90 10,000 20 30 40 50 frequency (hz) v in = 3.8 v v out = 2.8 v c o = 1.0 f i out = 60 ma t amb = 25 c 10 0 (db) 1000 100,000 60 80 120 10,000 20 40 100 1,000,000 100 85 c 25 c 40 c 150 ma 100 ma 60 ma 10 ma 2.800 output current (ma) 0 2.860 output voltage (v) 20 40 80 160 2.800 2.780 2.740 2.760 60 120 100 2.820 140 2.840 40 c 25 c 85 c 1 ma 100 ma 60 ma 150 ma
mc33263 http://onsemi.com 12 ordering and device marking information device marking version package shipping mc33263nw28r2 a 2.8 v mc33263nw30r2 b 3.0 v mc33263nw32r2 c 3.2 v mc33263nw33r2 d 3.3 v sot 23l 2500 ta p e & reel mc33263nw38r2 e 3.8 v sot23l 2500 tape & reel mc33263nw40r2 f 4.0 v mc33263nw47r2 g 4.75 v mc33263nw50r2 h 5.0 v
mc33263 http://onsemi.com 13 package dimensions sot23l nw suffix case 318j01 issue b ?? ?? ?? notes: 1. dimensions are in millimeters. 2. interpret dimensions and tolerances per asme y14.5m, 1994. 3. dimension e1 does not include interlead flash or protrusion. interlead flash or protrusion shall not exceed 0.23 per side. 4. dimensions b and b2 do not include dambar protrusion. allowable dambar protrusion shall be 0.08 total in excess of the b and b2 dimensions at maximum material condition. 5. terminal numbers are shown for reference only. 6. dimensions d and e1 are to be determined at datum plane h. dim min max millimeters a 1.25 1.40 a1 0.00 0.10 b 0.35 0.50 b1 0.35 0.45 0.25 0.20 c 0.10 3.60 c1 0.10 d 3.20 e 3.00 3.60 e1 2.00 2.40 e 0.95 e1 1.90 l 0.25 0.55 0 10 c1 e m 0.20 c c a m b a a m 0.10 c s a s b e1 b d 1 2 3 e e1 b a 0.05 a1 c b1 (b) l ??? section aa 6 5 4 pin 1 identifier in this zone h
mc33263 http://onsemi.com 14 notes
mc33263 http://onsemi.com 15 notes
mc33263 http://onsemi.com 16 on semiconductor and are trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. atypicalo parameters which may be provided in scill c data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including atypicalso must be validated for each customer application by customer's technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body , or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthori zed use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. publication ordering information japan : on semiconductor, japan customer focus center 4321 nishigotanda, shinagawaku, tokyo, japan 1410031 phone : 81357402700 email : r14525@onsemi.com on semiconductor website : http://onsemi.com for additional information, please contact your local sales representative. mc33263/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 3036752175 or 8003443860 toll free usa/canada fax : 3036752176 or 8003443867 toll free usa/canada email : onlit@hibbertco.com n. american technical support : 8002829855 toll free usa/canada

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